In the microelectronics industry, one commonly used technique for electrically connecting a semiconductor chip to a semiconductor chip packaging substrate is to dispose the back of the chip onto a packaging substrate in a region of the substrate wherein there are a plurality of substrate contact locations to surround the chip. The face of the chip which is no disposed on the substrate has a plurality of chip contact locations, typically in the vicinity of the chip periphery. Wires are bonded between the chip contact locations and corresponding substrate contact locations. The wires can be bonded to both the chip contact locations and the substrate contact locations by a variety of techniques. For example, wires can be soldered to both contact locations, wires can be thermocompression bonded to both contact locations and wires can be ultrasonically bonded to both contact locations. Any combinations of these techniques can be used to bond the wire to the chip contact location and the substrate contact location. There are variations of these commonly used techniques and there are other techniques for bonding the wire to the contact location.
Typically, the wires are aluminum wires or gold wires. Typically, the contact locations on the chip and on the substrate have commonly used metallurgies appropriate for the type of bonding which is be used to attach the wires thereto.
In contemporary and future products, increasingly larger numbers of chips will be mounted onto substrates. This will require more complex substrates having increased density which is achieved by more complex processing of the substrate. If chips which have defects are mounted onto such substrates, it is more cost effective to remove the chip and to replace it with a non-defective chip. The alternative, which is very costly, is to discard the entire substrate with good chips mounted onto a good substrate.
Removing a chip from a substrate and replacing it with another chip is commonly referred to in the art as rework. Tools are required to do rework in a cost efficient and reliable manner. Presently, chips which are wire bonded to a substrate are removed by clipping the wires with a cutting tool. This is a slow labor intensive process. Moreover, bringing a hand cutting tool close to the chip and substrate exposes both to damage from the tool which can be jammed into chip surface or substrate surface potentially damaging the top dielectric layer, the contact locations and the metallization on the surface and within the interior of the chip or substrate. Such damage can cause the chip or substrate to be nonfunctional. Moreover, when wires are cut using a clipping tool there is left at the substrate contact location and at the chip contact location a relatively long residual piece of wire which interferes with the rebonding operation to the contact location.
According to the present invention, an apparatus is provided wherein a jet of gas is caused to move back and forth over a plurality of wires bonded between chip contact locations and substrate contact locations. The jet of air forces the wires to be simultaneously pushed back and forth. This results in metal fatigue very close to the contact locations. The wires break at the point of contact between the wire and the contact locations all generally simultaneously thereby permitting the chip to be removed from the substrate.
U.S. Pat. No. 4,677,370 describes a magnetic tool for testing defects in a wire conductor bonded between a IC chip and a chip package. The package is placed in a magnetic field which generates currents through the conductors to induce a magnetic force. Preferably, the magnitude of the current is generated to change in a cyclic fashion to cause the wire to move back and forth. The current through the conductors is monitored to determine if a bond breaks under the force.
It is an object of the present invention to provide an apparatus and method for efficiently, reliably and cost effectively removing wires bonded between contact locations.
It is another object of the present invention to provide methods and apparatus that can remove large numbers of wires simultaneously so that a chip can be removed from a substrate in a short period of time.
Research Disclosure, September, 1990, No. 317, Kenneth Mason Publications, Ltd. England describes an inspection tool to assess ultrasonic bond quality. A picture is first taken of the bond. A brief pulse of a gas is supplied to the bond. During the time the gas jet is on a second image of the wire bond area is taken. The picture before and after the gas jet are compared. A significant movement of the wire is taken to mean a defective bond.
Japanese Patent Application 02-228437 published Sep. 11, 1990, discloses that an Au/Ag alloy is the best alloy to be used in wire bonding to reduce breakage of wires by vibration fatigue during the assembly of semiconductor chips.
U.S. Pat. No. 4,959,706 discloses an improved bonding pad having an elongated rectangular shape on which a wire is bonded at a location displaced towards an outer corner so that there is room on the pad for a second bond site to be made for a rework bond. This avoids problems associated with attempting to bond to a pad with a wire stub.